1. Field of the Invention
The present invention relates generally to a switching regulator and more particularly relates to a switching regulator for use with a wide range of load variations.
2. Description of the Prior Art
In the art there has been propsoed a switching regulator which can supply a stable DC voltage without the efficiency lowered and regardless of large variation of a load. As such a switching regulator, Koizumi U.S. Ser. No. 962,654, entitled "Switching Regulator", Filed Nov. 21, 1978, and assigned to the same assignee as the present invention, was proposed, and it will be first described with reference to FIG. 1.
In FIG. 1, reference 1 designates a power supply plug which will be supplied with the commercial AC voltage. The commercial AC voltage fed to the plug 1 is applied through power switches 2 to a rectifier circuit 3 and then rectified and smoothed thereby to be a DC voltage. The DC voltage thus produced is applied through a primary winding 4a of a transformer 4 with a magnetic core and a diode 5 for blocking a reverse current to an NPN-type transistor 6, which forms a first switching element, and the DC voltage appearing at the mid tap of the primary winding 4a is fed to an NPN-type transistor 7 which forms a second switching element. In this case, it is assumed that the inductance of the winding portion between one end and the mid tape of the primary winding 4a is taken as L1, and the inductance of the winding portion between the mid tap and the other end of the primary winding 4a is taken as L2.
Across a secondary winding 4b of transformer 4, there is produced an AC voltage due to the switching operation of transistor 6 or 7. This AC voltage derived from the secondary winding 4b is fed to a rectifier 8, and then rectified and smoothed as a DC voltage. This DC voltage is delivered to an output terminal 9. The DC voltage at the output terminal 9 is fed to a voltage detecting circuit or detector 10 which detects the value of the applied voltage. The detected output therefrom is applied through an insulating coupler 11 such as a photo-coupler or the like to a pulse width modulator 12, which will generate a switching signal, as a modulating input. While the pulse width modulator 12 is also supplied with the clock pulse from a clock pulse oscillator 13 as a carrier. The pulse width of the switching signal, which is the output signal from the pulse width modulator 12, is varied in response to the DC voltage obtained at the output terminal 9 to stabilize the DC voltage as a desired constant value.
In the prior art switching regulator shown in FIG. 1, a resistor 14 with a small resistance value and serving as a current detector is inserted between the secondary winding 4b of transformer 4 and the ground. The voltage drop across the resistor 14 is fed to a current detecting circuit or detector 15. This current detector 15 is so formed that its output side becomes a low level "0" when the voltage drop across the resistor 14, i.e., output current from the output terminal 9 is lower than a predetermined or threshold value I TH, while its output side becomes a high level "1" when the output current is higher than the predetermined value I TH. The detected output from the current detector 15 is fed through an insulating coupler 16 such as a photo-coupler or the like to a control circuit such as a D-type flip-flop circuit 17 at its D-input terminal which is also supplied at its trigger input terminal T with the clock pulse from the clock pulse oscillator 13. The output appearing at a Q-output terminal of the D-type flip-flop circuit 17 is fed, as a gate signal, to one input terminal of an AND-circuit 18 which is supplied at the other input terminal thereof with the switching signal from the pulse width modulator 12. The switching signal delivered from the AND-circuit 18 is applied to the base of the transistor 6. The output signal appearing at a Q-output terminal of flip-flop circuit 17 is fed, as a gate signal, to one input terminal of an AND-circuit 19 which is supplied at the other input terminal thereof with the switching signal from the pulse width modulator 12. The switching signal delivered from the AND-circuit 19 is applied to the base of the transistor 7.
According to the above prior art switching regulator, when a load connected to the output terminal 9 is small, the output current appearing at the output terminal 9 decreases. However, when the output current is lower than the predetermined or threshold level I TH of current detecting circuit 15, its detecting output becomes "0". Therefore, the output at the Q-output terminal of flip-flop circuit 17 becomes "0" in synchronism with the clock pulse from the clock pulse oscillator 13 and hence the transistor 7 becomes OFF.
At this time, however, since the output at the Q-output terminal of flip-flop circuit 17 becomes "1", the switching signal from the pulse width modulator 12 passes through the AND-circuit 18 and is fed to the base of transistor 6. Accordingly, the transistor 6 carries out the switching of the input DC voltage and hence an output DC voltage Vo is produced at the output terminal 9. In this case, since an input DC voltage Vi from the rectifier circuit 3 is applied to the whole primary winding 4a of transformer 4 or the series connection of inductances L1 and L2, if it is assumed that the duty ratio of the switching signal is taken as D, its period as Tp and the magnitude of the load as RL, respectively, the output DC voltage Vo is expressed as follows: ##EQU1##
The maximum output power Po is expressed as follows: ##EQU2##
Accordingly, if the inductance values L1 and L2 are previously selected, the output voltage Vo, which is sufficiently stable regardless of load variations, can be obtained even if the load is small.
When the load connected to the output terminal 9 is great, the output current at the output terminal 9 increases. If the output current exceeds the threshold level I TH of DC current detector 15, its detected output becomes "1". Thus, the output at the Q-output terminal of flip-flop circuit 17 becomes "0" in synchronism with the clock pulse from the clock pulse oscillator 13, so that the output from the AND-circuit 18 becomes "0" and hence the transistor 6 turns OFF. At this time, however, since the output at the Q-output terminal of flip-flop circuit 17 becomes "1", the switching signal from the pulse width modulator 12 is fed through the AND-circuit 19 to the base of transistor 7 to make the latter operative. Thus, in this case, the winding portion of the primary winding 4a of transformer 4 from its one end to its mid tap, whose inductance value is L1, is actually used. Thus, the maximum output power Po at this time is expressed as follows: ##EQU3##
In this case, since the inductance value is small as compared with the case where the load is small, the maximum output power Po, which can be derived from the output terminal 9, becomes great as will be clear from the equations (1) and (2). That is, even if a great output is derived, the DC voltage at the output terminal 9 is stable, or even if the load is great, the DC voltage, which is sufficiently stable for the load variations, can be obtained. In this case, since the load variation is processed by changing the inductance value to L1+L2 or L1, the efficiency is not lowered. Further, in this case, the transistor 6 or 7 is switched by the switching signal obtained at the output side of the pulse width modulator 12, so that a desired constant DC voltage can be obtained at the output terminal 9.
With the above prior art switching regulator, however, since the current appearing at the secondary side of transformer 4 is detected so as to detect the load variation, the coupler 16 such as a photo-coupler or the like is necessary so as to insulate the primary side of transformer 4 from its secondary side and also the resistor 14 and current detector 15 are necessary for detecting the current. Thus, the prior art switching regulator is complicated in circuit construction and hence expensive.
In the prior art switching regulator of FIG. 1, if the pulse width of the switching signal applied to the transistor 6 is 50% upon the transistor being switched from 6 to 7, the transistor 7 is operated with that pulse width. Thus, the output voltage becomes somewhat overshot and hence the transistor is switched from 7 to 6, so as to decrease the pulse width rapidly. At this time, in turn the output voltage becomes much too low, and hence the pulse width becomes wide. Thus, the transistor is switched again to 7, and a kind of oscillation is caused. As a result, the switching of switching elements can not be carried out smoothly.